Enhancement of ECG signal by DFT using Fast Fourier Transform (FFT) Algorithm
A primarily diagnostic tool for cardiovascular diseases ECG , a non invasive technique generally used during acquisition and transportation. Noises like channel noise, baseline wander noise, muscle artifacts, electrode motion, often embedded with ECG signal. In this paper a methology to overcome from channel noise embedded during the transportation of ECG signal, proposed in this methodology DFT of noisy ECG signal calculated using fast fourier transform (FFT) algorithm. The experimental result demonstrate the proposed method is superior to other with higher SNR and lower RMSE factor, performance comparison at 1.25 dB is demonstrated. Keyword: ECG, Channel noise, Gaussian function, FFT, Wavelet transform, S-Transform.
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Reduction of Area and Power Using ECSFD in Wireless Sensor Networks
Collaborative Sensor Fault Detection (CSFD) technique is used to detect the faults in the sensor nodes of a fusion center in a robust distribution estimation scheme. This technique can identify the faulty nodes efficiently and improve the accuracy of the estimates. ASIC implementation is used to design the fusion center based on their applications. In this approach there occurs some limitations such as computational complexity; hardware implementation is quite complex and high power consumption. In order to overcome these difficulties, we modify CSFD and propose an ECSFD scheme. ECSFD is simple and requires lower computational complexity, thus lower hardware cost and power consumption can be achieved. Furthermore, ECSFD achieves almost the same performance as CSFD. VLSI architecture is developed for hardware implementation.
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Streamlined Compression Techniques for Medical Images
By and large in remedial field checking performed on the little part of a picture anyway it comes to fruition high cost and less transmission speed as a result of its gigantic picture measure. Continuously it is to a great degree troublesome errand to diminish the degree of the picture without loss of information. At this situation by using some pressure strategies which are having the ability of higher remaking quality we will diminish the span of the picture. In any case, the nature of a photo expect a key part in the solution. On account of this reason we proposed upgraded pressure procedures. As a piece of this method we are performing district based division procedure by part the picture into two locales, ROI and NONROI which are trailed by applying LOSS and LOSSLESS pressure strategies. By applying different wavelets for ROI and NONROI pictures, we will register the pressure proportion and recognize the best appropriate wavelet procedure. By then we will finish our requirements i.e. picture with high transmission speed, less cost and less size. At long last compacted picture should be transmitted through flexible and web organizations. This examination article guarantees bolster for the destitute society with in regards to savvy who are enduring with ailments.
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A Novel Hybrid Structure of SVC and IPFC for Static Voltage Stability Margin Improvement
In this paper, the structure of Hybrid Power Flow Controller (HPFC) is proposed in order to improve static voltage stability characteristics. HPFC forms a hybrid controller using IPFC series converters as a hybrid with existing parallel and passive compensator (SVC) in power system. Utilization of hybrid structures makes it possible to use converters for improving performance of both old and existing compensators in power networks. In this study, the power injection model (PIM) is used to model the hybrid power flow controller in Newton load flow. The aforementioned model is simulated in MATLAB software. The P-V curves of PQ buses of a typical system are evaluated by a continuous power flow (CPF) method to analyses the effect of this controller on static voltage stability characteristics. Meanwhile, SVC as existing devices in the system and UPFC and IPFC as state-of-the-art compensator devices are compared with the proposed hybrid structure. The amount of active and reactive power loss and improvement of loading limit of the system are used as main parameters in our comparison.
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Design and Analysis of Area and Power Efficient Tree Topology Based Multiplexer
In this paper a power and area efficient design of 32:1 tree type multiplexer has been designed by hybridizing GDI and PTL techniques. Multiplexer circuit using this technique consumes less power in comparison to the CMOS, TG and other logic design techniques. The proposed design consists of 63 NMOS and 31 PMOS. At 1.2 V power supply the proposed MUX design consumes 47.093 ?W power on BSIM-4 and 47.09 ?W power on LEVEL-3 with simulation length of 5n. The proposed multiplexer is designed and simulated using DSCH 3.1 and MICROWIND 3.1 on 180nm.
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Firefly algorithm to solve non-convex economic dispatch problems with generator constraints and heuristic load patterns
This paper presents a new algorithm called Firefly Algorithm (FA) to solve the well-known power system economic load dispatch (ELD) problem. FA is a novel nature-inspired algorithm inspired by social behavior of fireflies and the phenomenon of bioluminescent communication between them. The effectiveness of the proposed algorithm has been tested with the standard 6-bus, IEEE-14 bus and IEEE-30 bus system with several heuristic load patterns. The result of the proposed algorithm is compared with the results available in the literature. The numerical result reveals that the proposed algorithm can provide appreciably better solutions within reasonable time.
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A novel approach for distribution system state estimation with renewable energy sources based distributed generations
State estimation in electrical distribution systems (EDSs) is an analyzing tool for estimating the state of it for close monitoring and controlling by distribution management system (DMS). In this paper, RESs integrated EDS’s state is estimated using the distribution system state estimation (DSSE) model. It is a minimization problem with equality and inequality constraints which describe the practical considerations of real time EDS. The objective of DSSE modeling and its minimization is to compute state variables. For minimizing the objective function of DSSE model Artificial Bee Colony (ABC) algorithm is used to estimate load and Renewable Energy Sources (RESs) output. The performance of the proposed work is evaluated on IEEE 33 bus test system using MATLAB working platform and compared with other evolutionary optimization algorithms.
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A Review Paper on Microstrip Patch Antenna used in WLAN systems
A compact microstrip patch antenna became a very useful in communication systems. Properties like compactness, light weight, high bandwidth make it a good candidate of communication system. This paper reviews the performance analysis of Compact Dual-Band Microstrip Antenna for IEEE 802.11a WLAN Application [1], comparative analysis of sshaped Multiband microstrip patch Antenna [2], Dual-Band Antenna with Compact Radiator for 2.4/5.2/5.8 GHz WLAN Applications [3], A Slot-Monopole Antenna for Dual-Band WLAN Applications [4] and Compact Broadband Slotted Rectangular Microstrip Antenna [5]. The paper also discusses the technology used in order to bring the required changes in terms of improved performance characteristics.
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Design and FPGA Control of Modular Multilevel Inverter for Photovoltaic Applications
Recently, modular multilevel inverter(MMLI) have gained interest for photovoltaic applications. This topology minimizes the total harmonic distortion both at the DC and AC side and reduces the voltage stress across the devices for high voltage applications compared to the conventional multilevel inverter. This paper explains the significance of a MMLI by employing phase shift PWM technique. This control algorithm is implemented in SPARTAN/FPGA board. The important aspect of this paper is the issues related to capacitor voltage balancing is addressed. The MMLI is powered by PV source and the modeling of PV alongwith MPPT is implemented in MATLAB. The validity of the proposed modular MLI topology is confirmed by simulation and experimentation.
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Digital prepaid for enhanced metering and billing system
This paper presents a single phase digital prepaid energy meter based on two microcontrollers and a single phase energy meter IC. This digital prepaid energy meter does not have any rotating parts. The energy consumption is calculated using the output pulses of the energy meter chip and the internal counter of microcontroller (ATmega32). A microcontroller (ATtiny13) is used as a smart card and the numbers of units recharged by the consumers are written in it. A relay system has been used which either isolates or establishes the connection between the electrical load and energy meter through the supply mains depending upon the units present in the smart card. Energy consumption (kWh), maximum demand (kW), total unit recharged (kWh) and rest of the units (kWh) are stored in the ATmega32 to ensure the accurate measurement even in the event of an electrical power outage that can be easily read from a 20×4 LCD. As soon as the supply is restored, energy meter restarts with the stored values. A single phase prepaid energy meter prototype has been implemented to provide measurement up to 40A load current and 230V line to neutral voltage. Necessary program for microcontrollers are written in c-language and compiled by Win-AVR libc compiler.
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